PCIS3BASE Spartan-3 FPGA PCI board

«This Spartan-3™ FPGA board has a PCI bus master interface. A 78-pin HD-SUB connector and a 34-pin 0,1" header can be used for connecting external signals. A slot between the FPGA and the HD-SUB connector allows to integrate additional electronic components (PIB plug-in board). Included is a standard PIB which provides 64 I / O signals with 5 volt tolerance..»

target applications

  • PC peripherals
  • industrial control
  • custom test equipment

features

  • Xilinx Spartan-3® FPGA
       XC3S1500-4FG456C
  • PLX PCI-9056 Pci-controller
  • 32 MByte SDRAM
       Micron 48LC16M16A2
  • 4Mbit SPI flash
  • 64 io signals on PIB slot 
  • 28 io signals on pin header
  • reference design included
  • PCI data rate up to 120 MByte/s
  • 78 pin external io connector
  • 8 user Leds

PCI controller

The PCI interface of the card is driven by an external controller, the PLX PCI-9056. The FPGA design does not need to include an PCI implementation code (IP-core). The details of the PCI bus need not be known to the developer.

configuration options

You can configure the FPGA using the Xilinx Platform Cable (JTAG) or via PCI using your own UDK-based software or the UDK tools that come with the board. All this options are always available - there is no need to choose with switches or jumpers.

PIB slot for users peripheral

The PCIS3BASE FPGA board comes with the slot-board "PIB64IO" as default. It has 8 5-Volt tolerant buffers with 8 signals each. The buffer directions are switchable by FPGA io signals. For spezial requirements, you can develop your own custom PIB or ask to get an offer.  

included tools

Included in the UDK, there are tools to perform FPGA configuration, read and write data and control the reset-pin. 

Unified Development Kit UDK and API

The Cesys UDK is an API for FPGA configuration and interfacing the FPGA to the software running on your PC. The UDK handles everything between a API call from your software and a Wishbone bus transaction inside the FPGA. Read and write calls are serialized through the PCI interface, making the FPGA bus address space directly accessible by your software. Using the UDK results in an enormous saving in time and development resources.  It is available at no additional cost when used with Cesys boards. To use it with 3rd party hardware, we offer a pay-once licensing model for the UDK source-code.

reference design

Use our extensively tested reference designs as a starting point for your projects. We use our own reference designs for many customer projects and can therefore offer you the very best support.

design-in support

We have great interest in ensuring that your project is successful. That is why we will give great effort to assist you. We will answer questions that you ask in our support-forum as soon as possible because sometimes, it's the little things that stop you. In addition to our free forum-support, we offer fee-based support and development service customized to your needs.

prototyping and OEM integration

The PCIS3BASE PCI board was built for prototyping systems and integration into OEM devices. 


block schematics

click to enlarge

XC3S500E FPGA attributes

devicesystem gatesequivalent logic cellsdistributed RAM bitsblock ram bitsdedicated multipliersdcms
XC3S15001500k20,952208k576k324

development tools

To develop your own FPGA solutions, Xilinx offers the ISE design suite. The XC3S1500  FPGA that is used on the PCIS3BASE is supported by the free version, called WebPack Edition.


documentation and downloads

Download documentation.
Get answers, download* drivers, tools and reference designs from the Cesys support forum.
* To enter the protected download area of the forum, you have to register in the forum and ask the forum admin to flag you as a customer.


ordering information

itemFPGAarticle numberavailability
PCIS3BASEXC3S1500-4FG456CC1010-3105warehouse type


We deliver worldwide.
Please place your order in our online-shop or send us your P.O. by fax or email.

order online

Check price & availability. Order online.