UDK Unified Development Kit.

UDK - the turnkey solution to FPGA ↔︎ host communication

key features

  • FPGA configuration and management by a remote host
  • address-based host access to an FPGA-internal AXI4 or Wishbone bus

easy to use

Pre-engineered, proven-in-practice communication between a host PC and IP cores in FPGAs. Read from and write to the local bus of your FPGA design (AXI4 or Wishbone) by using UDK functions. Addresses, burst length and data are tunneled through any of the supported native interfaces. The UDK bus-master IP core then performs the requested operation on the AXI4 or Wishbone bus of the target FPGA device.
It is as easy to use as "memcpy" on your local machine.   

unified functionality

Use the same API calls with all supported interfaces. Switch designs painless between  interfaces.

built-in system management

Remote board identification, FPGA configuration and system reset. 

maximum throughput

Small protocol overhead allows maximal throughput. When using a USB 3.0 interface with 1 MByte buffers, the throughput is more than 99,2% of the possible maximum.

stable function

Since 2005, we have been using the UDK successfully in many projects that we developed for our customers. Some of this projects are extremely sensitive to loss of data or data corruption. We never had trouble caused by the UDK.

continuos development

The first Version of UDK was running with USB 1.1. Since then, PCI, PCI-Express, USB 2.0 and USB 3.0 were added. Currently, we prepare the UDK to run with Gigabit Ethernet to support our future coming hardware products.

figure: UDK3 communication via USB 3.0

compatibility table

boards interface UDK2 UDK3
EFM-01
USBS6
USBV4F
USB 2.0 XP1,4, Vista1, Win71, Win81 XP1,4, Vista3, Win73, Win83
Linux2
OS X5
EFM-02 USB 3.0 not supported
(not planned)
XP1,4, Vista3, Win73, Win83
Linux3
OS X5
PCIS3BASE PCI XP1,4, Vista1, Win71, Win81
Linux2
XP1,4, Vista1, Win71, Win81
Linux2
PCIeV4BASE PCIe XP1,4, Vista1, Win71, Win81
Linux2
XP1,4, Vista1, Win71, Win81
Linux2
  Ethernet
socket
not supported
(not planned)
planned

1 32 bit architecture support.
2 64 bit architecture support.
3 32 + 64 bit architecture support.
4 Support based on historically reasons, but not actively maintained.
5 Experimental and not offically available. If there is any interrest, please contact us.

UDK documentation

All UDK user guides and application notes are on the FPGA download page.

licensing options

The UDK is available at no additional cost when, and only when, used with boards supplied by Cesys. This applies to our standard products and customer specific assemblies that are purchased from us.

To use the UDK with hardware that is not supplied by Cesys, we offer a pay-once licensing model for the UDK source-code.

Please contact us to purchase this license.
Your contact person is Mr. Manfred Kraus.